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High Input Impedance: JFET Input Stage
Tip Width: 3mm/0
Logical Function: Shift Register
This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC
LPF ACV function for measuring INV and VFD voltage
74LS13 dual 4-input schmitt trigger IC in PAKISTAN Elitech High Input Impedance: JFET InputSCHMITT TRIGGERS in pakistanDUAL GATE HEX INVERTER The SN54LS 74LS13 and SN54LS 74LS14 contain logic gates inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter free output signals. Additionally, they have greater noise margin than conventional inverters. Each circuit contains a Schmitt trigger followed by a Darlington level
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